Common Source Amplifier with Source DegenerationAjay Di sharma
Common Source Amplifier with Source Degeneration.
The small-signal amplification performance of the CS amplifier discussed in the previous lecture can be improved by including a series resistance in the source circuit. (This is very similar – if not identical – to the effect of adding emitter degeneration to the BJT CE amplifier.) This so-called CS amplifier with source degeneration circuit is shown in
We have a choice of small-signal models to use for the MOSFET. A T model will simplify the analysis, on one hand, by allowing us to incorporate the effects of RS by simply adding this value to 1/gm in the small-signal model, if we ignore ro. This small-signal circuit is shown in
On the other hand, using the T model makes the analysis more difficult when ro is included. (The hybrid ð model is better at easily including the effects of ro.) However, ro in the MOSFET amplifier is large so we can reasonably ignore its effects for now in the expectation of making the analysis more tractable.
Small-Signal Amplifier Characteristics
We’ll now calculate the following small-signal quantities for this MOSFET common source amplifier with source degeneration: Rin, Av, Gv, Gi, and Rout.
• Input resistance, Rin. Referring to the small-signal equivalent circuit above in with I g=0 then
Rin = Rg
• Partial small-signal voltage gain, Av. We see at the output side of the small-signal circuit in
V0= – gmVgs(RD||RL)
which is the same result (ignoring ro) as we found for the CS amplifier without source generation. At the gate, however, we find through voltage division that
This is a different result than for the CS amplifier in that vgs is only a fraction of vi here, whereas vgs =Vi without RS. Substituting (3) into (2), gives the partial small-signal AC voltage gain to be
• Overall small-signal voltage gain, Gv. As we did in the previous lecture, we can derive an expression for Gv in terms of Av. By definition,
Applying voltage division at the input of the small-signal equivalent circuit in Fig. 4.44(b),
Substituting (6) into (5) we the overall small-signal AC voltage gain for this CS amplifier with source degeneration to be
• Overall small-signal current gain, Gi. Using current division at the output in the small-signal model above in
while at the input,
Substituting (9) into (8) we find that the overall small-signal AC current gain is
• Output resistance, Rout. From the small-signal circuit in with vsig =0 then i must be zero leading to
Adding RS has a number of effects on the CS amplifier. (Notice, though, that it doesn’t affect the input and output resistances.) First, observe from (3)
that we can employ RS as a tool to lower vgs relative to vi and lessen the effects of nonlinear distortion. This RS also has the effect of lowering the small-signal voltage gain, which we can directly see from (7). A major benefit, though, of using RS is that the small-signal voltage (and current) gain can be made much less dependent on the MOSFET device characteristics. (We saw a similar effect in the CE BJT amplifier with emitter degeneration.) We can see this here for the MOSFET CS amplifier using (7)
The key factor in this expression is the second one. In the case that gm RS >> 1 then
which is no longer dependent on gm. Conversely, without RS in the circuit ( Rs =0 ), we see from (7) that Gva gm . and is directly dependent on the physical properties of the transistor (and the biasing) because
in the case of an NMOS device. The “price” we pay for this desirable behavior in (12) – where Gv is not dependent on gm – is a reduced value for Gv. This Gv is largest when Rs =0 , as can be seen from (7).
Example N32.1 (based on text exercises 4.32 and 4.33). Compute the small-signal voltage gain for the circuit below with Rs =0 , kn’ W/ L’ =1 mA/V2 and Vt = 1.5 V. For a 0.4-Vpp sinusoidal input voltage, what is the amplitude of the output signal?
For the DC analysis, we see that VG =0 and ID= IS = 0.5 mA. (Why is VG = 0?) Consequently,
VD =10 – RDID =10 -14 K •5m = 3V Assuming MOSFET operation in the saturation mode
Assuming MOSFET operation in the saturation mode
VGS-1.5=+1 VGS=2.5 or 0.5V
Vs = – 2.5 V
for operation in the saturation mode. For the AC analysis, from (13) g<m= 10=(2.5-1.5)=1 mS Using this result in (7) with Rs =0 gives
For an input sinusoid with 0.4-Vpp amplitude, then
V0Gv . Vsig=22.214.171.124 V pp = 2.74 Vpp
Will the MOSFET remain in the saturation mode for the entire cycle of this output voltage? For operation in the saturation mode, vDG= vD >Vt = 1.5 V. On the negative swing of the output voltage,
which is greater than Vt, so the MOSFET will not leave the saturation mode on the negative swings of the output voltage. On the positive swings,
which is less than VDD = 10 V so the MOSFET will not cutoff and leave the saturation mode. (Interestingly, the MOSFET does leave the saturation mode on the negative swings for 15 RD= RL = 15 k beta, as used in the text exercises 4.32 and 4.33.) Lastly, imagine that for some reason the input voltage is increased by a factor of 3 (to 1.2 Vpp). What value of RS can be used to keep the output voltage unchanged?
Lastly, imagine that for some reason the input voltage is increased by a factor of 3 (to 1.2 Vpp). What value of RS can be used to keep the output voltage unchanged? From (7), we can choose RS so that the so-called feedback factor 1+ gm Rs equals 3. The output voltage amplitude will then be unchanged with this increased input voltage.Hence, for
With R s=2 k beta the new overall small-signal AC voltage gain is from (7)
The overall small-signal voltage gain has gone down, but the amplitude of the output voltage has stayed the same since the input voltage amplitude was increased.